New memory map, simple EEPLD programming

And here I thought that WinCupl was a beast to comprehend. But it turns out I was missing some information. The magic happens with fields. All I had to do is specify addresses in my equations to let WinCupl work out the logic for me. My first try was to use pure logic gates. And this failed for me when I tried to address IO within the range of ROM and RAM. Live and learn, I am after all new at this.

Behold the simplicity of WinCupl's power:

Name       Mainboard Logic Decode v2;
PartNo     ATF22V10C ;
Date       2020-11-22 ;
Revision   01 ;
Designer   The Micro Hobbyist ;
Company    Self ;
Assembly   6502 mainboard logic ;
Location   U105 ;
Device     G22V10;

/* *************** INPUT PINS *********************/

PIN 1   =  CLK;     /* Clock */
PIN 2   =  A15;
PIN 3   =  A14;
PIN 4   =  A13;
PIN 5   =  A12;
PIN 6   =  A11;
PIN 7   =  A10;
PIN 8   =  A9;
PIN 9   =  A8;
PIN 10  =  IRQ0;    /* IRQ from VIA */
PIN 11  =  IRQ1;    /* IRQ from ACIA */
PIN 13  =  RW;     /* Read Write */

FIELD ADDRESS = [A15..A8];

/* *************** OUTPUT PINS *********************/

PIN 23  =  !ROM;    /* ROM select */
PIN 22  =  !RAM;    /* RAM select */
PIN 21  =  !RTC;    /* Realtime Clock select */
PIN 20  =  !VIA;    /* Parallel select */
PIN 19  =  !ACIA;   /* Serial select */
PIN 18  =  !LCD1;   /* LCD (top) select */
PIN 17  =  !LCD2;   /* LCD (bottom) select */
PIN 16  =  !TEMP;   /* Preprogrammed IO (not used for now) */
PIN 14  =  !OE;     /* Output Enable, or !Read */
PIN 15  =  IRQ;     /* IRQ merge */

/* *************** EQUATIONS *********************/

ROM     =  CLK & ADDRESS:[9000..FFFF];
RAM     =  CLK & ADDRESS:[0000..6FFF];
RTC     =  CLK & ADDRESS:[7000..77FF];
ACIA    =  ADDRESS:[7800..78FF];
VIA     =  ADDRESS:[7900..79FF];
LCD1    =  ADDRESS:[7A00..7AFF];
LCD2    =  ADDRESS:[7B00..7BFF];
TEMP    =  ADDRESS:[7C00..7CFF];
OE      =  RW;
IRQ     =  IRQ0 & IRQ1;

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