6502 8-bit adventure

 I haven't been very active lately on the blog. You know, life! That and I was working on the monitor program for my build. Anyway, above is a picture of my build on this day. Getting the 40x4 display working was a pain, but I managed to figure it out. I'm still debating if I should use the single 40x4 display, or a 20x4 display AND a graphical display. The pros and cons: The 40x4 LCD actually operates as 2 independent LCDs and requires 2 enable pins for top and bottom portions. So this makes it harder to code for. You have to admit, it looks pretty spiffy. However, the 20x4 display is easier to code for. I am also considering a graphical display, possibly as a second display? Time and budget will tell... stay tuned.

And here I thought that WinCupl was a beast to comprehend. But it turns out I was missing some information. The magic happens with fields. All I had to do is specify addresses in my equations to let WinCupl work out the logic for me. My first try was to use pure logic gates. And this failed for me when I tried to address IO within the range of ROM and RAM. Live and learn, I am after all new at this. Behold the simplicity of WinCupl's power: Name       Mainboard Logic Decode v2; PartNo     ATF22V10C ; Date       2020-11-22 ; Revision   01 ; Designer   The Micro Hobbyist ; Company    Self ; Assembly   6502 mainboard logic ; Location   U105 ; Device     G22V10; /* *************** INPUT PINS *********************/ PIN 1   =  CLK;      /* Clock */ PIN 2   =  A15; PIN 3   =  A14; PIN 4   =  A13; PIN...

This is it, a completed build... well hardware-wise. All I need now is to concentrate on the software side. It will be quite a challenge, as I haven't programmed in assembly for 30 years.

This is my 3rd iteration of the breadboard 6502 SBC. Note that I've installed a ZIF socket for easy removal and insertion of the ROM. The top breadboard is the clock module, so I can step into the code and analyze it via the makeshift logic analyzer on the Arduino Mega. The LCD "Hello world" functions as expected. And the RTC / NVRAM has been tested and works fine.   The ACIA is not yet connected and is my next step. Of course, I will be sending a "Hello world" message to my computer via RS232 to test it out. I still have room for more IO on the PLD. Any suggestions?

When I start something interesting, I tend to overdo it. I originally contemplated using standard gates for my glue logic. But then chose to go the EEPLD (Electrically Erasable Programmable Logic Device) route. Wow, was I ambitious? Not only I was to build the 6502 single-board computer from the ground up, but I had to also get to know PLDs up close and personal at the same time. Well, it turns out it's not all that hard, if you find the right tutorials on the web, and if you have a precise memory map defined. I had this really particular memory map planned. But for my second iteration of the SBC, I opted to go simply and work my way up.  The map, for now, is 32K ROM, 16K IO space, and 16K RAM. This will change in the future. And this is the beauty of PLDs, there is no need to rewire anything. It's just the software that needs changing. I chose the ATF22V10C, a G22V10 equivalent, because of it's many input and output options: 12 dedicated inputs, and 10 configurable input/o...

It turns out I had an issue with my wiring AND the breadboard power supply could not provide enough power. So I scrapped all my wiring, not trusting it, and plugged in my bench power supply as a stable source. It took all day to rewire the board with the VIA and LCD, but it was worth it... or was it. Well, it turns out I had another mystery bug. And that one was very sneaky. It took me a while to catch on, but it turns out my EEPROM chip was defective. Darn! I only have one more in stock. I need to buy a few spares, just in case. But in the end, I got my "Hello World" to print on the LCD. That was quite satisfying! PS: Before you comment on my wiring, yes, I know, it's not as neat. But I didn't want to spend too much time on it. I need to know it works, and get to the next step, the ACIA and RTC. Because as soon as I know this works, I'll either etch my own board, or go the PCBWay!

 As Perifractic would say, hello chip dippers. I worked on a version 1 of my breadboard 6502 last week. Sorry for now posting about it earlier. I opted to have some LEDs on the address and data bus for show. The hard-coded data lines 0xEA worked as expected. But as I increased the number of chips on the board, the ROM, and the RAM and the PLD (for decode logic), things started not to work so nicely. Stay tuned!